Extremely scaled CMOS materials
Research Team


Extremely scaled CMOS materials Research TeamAbout

Extremely scaled CMOS technology

We are currently advancing R&D with the primary objective of enhancing the performance of CMOS transistors, which serve as integral components of state-of-the-art logic semiconductors. To address the challenges associated with the miniaturization of CMOS transistors, our efforts are directed towards the development of materials and process technologies. These technologies encompass non-Si materials, including Ge and two-dimensional materials, in addition to the foundational Si materials that underpin CMOS technology. Furthermore, we are actively engaged in the advancement of “IMPULSE-TCAD”, an original TCAD developed by AIST. This initiative is driven by the aim of establishing comprehensive design guidelines for advanced CMOS devices. Through the utilization of these CMOS technologies, we are advancing the development of innovative devices, such as nanosheet transistors, CFETs, and novel material channel transistors.

Extremely scaled CMOS materials Research TeamKeywords

CMOS transistor

2nm process

2D materials

IMPULSE-TCAD

CFET

Extremely scaled CMOS materials Research TeamFacility

Super Clean Room (SCR)

Website:Super Clean Room (aist.go.jp) 

COLOMODE (Communal Fabrication Line for Outstanding Modern Devices)

Website:COLOMODE (aist.go.jp) 

Nano-Processing Facility(NPF)

Website:Nano-Processing Facility (tia-kyoyo.jp) 

Super Clean Room (SCR)
COLOMODE
Nano-Processing Facility (NPF)

Extremely scaled CMOS materials Research TeamTeam Members

OKADA Naoya
TeamLeader
ASANUMA Shutaro
KAMIOKA Takefumi
KAWANAGO Takamasa
TAKEMOTO Sou
CHANG Wen-Hsin
HATAYAMA Shogo
FUKUDA Kouichi
MAKINO Kotaro
MOROTA Misako
BOLOTOV Leonid
Invited Senior Researcher
MAEDA Tatsurou
Adjunct
HATTORI Jun'ichi
Adjunct

Research Team

National Institute of Advanced Industrial Science and Technology(AIST)
Semiconductor Frontier Research Center

16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan  [Access]
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